Design methodology for programmable video signal processors

This paper presents a design methodology for a high-performance, programmable video signal processor (VSP). The proposed design methodology explores both technology-driven hardware tradeoffs and application-driven architectural tradeoffs for optimizing cost and performance within a class of processor architectures. In particular, this methodology allows concurrent consideration of these competing factors at different levels of design sophistication, ranging from early design exploration towards full processor simulation. We present the results of this methodology for an aggressive VeryLong-Instruction-Word (VLIW) video signal processor design and discuss its utility for other programmable signal processor designs.